1. Field of the Invention
The present invention relates to a computer system using a flash memory as its storage device, and particularly relates to speedup of data transfer in the storage device.
2. Description of the Related Art
In recent years, as a storage medium of a digital still camera or mobile computer device, attention is paid to a flash memory.
A flash memory is a semiconductor memory using tunneling or hot electron acceleration to make electrons pass through a gate insulation film and injecting them into a floating gate or trap layer to make a threshold value of a cell transistor change and thereby make it store data. A memory cell can be configured by just one transistor using a stacked gate structure, an MNOS 9 (metal-silicon nitride-silicon dioxide-silicon) structure, etc., therefore a cheap and large capacity memory can be realized. As a representative example, a NAND (Not And) type flash memory can be explained.
FIG. 1 is a diagram of an example of the internal configuration of a NAND type flash memory. The NAND type flash memory of FIG. 1 has a plurality of memory units 1-1 to 1-n connected to bit lines BL1 to BLn arranged in an array (vertically and laterally).
For example, the gate of a selection transistor 2 is connected to a selection gate line SL1, and gates of selection transistors 3 are connected to a selection gate line SL2. Further, gates of memory cells N0 to N15 are connected to word lines WL0 to WL15.
The memory cells N0 to N15 have stacked gate structures and store data according to charge accumulation in the floating gates. Namely, when many electrons are accumulated in the floating gates, the threshold values of the transistors rise, therefore the presence of current passing through the memory units 1 (-1 to -n) from the charged bit lines BL1 to BLn is detected by an access circuit 4 including a sense amplifier etc. to determine the data.
Such a NAND type flash memory does not require that a contact region be provided to the bit line for each memory cell, therefore is suitable for a medium of a particularly large capacity and cheap storage device.
In general, the programming speed of a flash memory is very slow. Several hundred microseconds are taken per cell. Further, overwriting of data is not possible, therefore it is necessary to erase data before the programming. A time of as long as several microseconds is taken for this. This problem is treated by processing many memory cells in parallel.
Namely, by simultaneously writing data in a group of memory cells 5 connected to for example the same word line WL0 and forming a page unit and further erasing a cell block 6 configured by the groups of pages sharing the memory unit, a transfer speed of the program is improved.
Specifically, a 1 Gb NAND type flash memory is described in for example ISSCC 2002 Preprints, p. 106, Session 6.4. The page size is set to 2 kBytes, and the erase block size is set to 128 kB. Namely, by erasing a group of memory cells of 128 kBytes in parallel in one memory array and programming the memory cells there for each 2 kBytes in parallel, a program transfer speed of 10 MB/s is realized.